124 lines
3.8 KiB
Plaintext
124 lines
3.8 KiB
Plaintext
This chapter documents the backend for the MOS/Rockwell 6502
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microprocessor family. It also supports the Rockwell/WDC 65C02 and the
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Hudson Soft HuC6280 instruction sets.
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@section Legal
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This module is written in 2002,2006,2008-2012,2014-2018 by Frank Wille
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and is covered by the vasm copyright without modifications.
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@section Additional options for this module
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This module provides the following additional options:
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@table @option
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@item -6280
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Recognize all HuC6280 instructions.
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@item -c02
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Recognize all 65C02 instructions. This excludes DTV (@option{-dtv})
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and illegal (@option{-illegal}) instructions.
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@item -dtv
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Recognize the three additional C64-DTV instructions.
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@item -illegal
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Allow 'illegal' 6502 instructions to be recognized.
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@item -opt-branch
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Enables 'optimization' of B<cc> branches into
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"B<!cc> *+3 ; JMP label" sequences when necessary.
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@item -wdc02
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Recognize all 65C02 instructions and the WDC65C02 extensions
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(RMB,SMB,BBR,BBS,STP,WAI).
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@end table
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@section General
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This backend accepts 6502 family instructions as described in
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the instruction set reference manuals from MOS and Rockwell, which are valid
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for the following CPUs: 6502 - 6518, 6570, 6571, 6702, 7501, 8500, 8502.
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Optionally accepts 65C02 family instructions as decribed in the
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instruction set reference manuals from Rockwell and WDC. Also supports
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the WDC extensions in the W65C02 and W65C134.
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Optionally accepts 65CE02 family instructions as decribed in the
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instruction set reference manuals from Commodore Semiconductor Group.
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Optionally accepts HuC6280 instructions as described in the instruction
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set reference manuals from Hudson Soft.
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The target address type is 16 bit.
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Instructions consist of one up to three bytes for the standard 6502 family
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(up to 7 bytes for the 6280) and require no alignment.
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There is also no alignment requirement for sections and data.
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All known mnemonics for illegal instructions are optionally recognized (e.g.
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@code{dcm} and @code{dcp} refer to the same instruction). Some illegal
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insructions (e.g. @code{$ab}) are known to show unpredictable behaviour,
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or do not always work the same on different CPUs.
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@section Extensions
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This backend provides the following specific extensions:
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@itemize @minus
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@item The parser understands a lo/hi-modifier to select low- or high-byte
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of a 16-bit word. The character @code{<} is used to select the low-byte
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and @code{>} for the high-byte. It has to be the first character before
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an expression.
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@item When applying the operation @code{/256}, @code{%256} or @code{&256}
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on a label, an appropriate lo/hi-byte relocation will automatically be
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generated.
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@end itemize
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This backend extends the selected syntax module by the following
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directives:
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@table @code
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@item setdp <expr>
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Set the current base address of the zero/direct page for
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optimizations from absolute to zero-page addressing modes.
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Example: set it to @code{$2000} for the HuC6280/PC-Engine.
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@end table
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@section Optimizations
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This backend performs the following operand optimizations:
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@itemize @minus
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@item Branches, where the destination is out of range, are translated
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into @code{B<!cc> *+3} and an absolute @code{JMP} instruction.
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@end itemize
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@section Known Problems
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Some known problems of this module at the moment:
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@itemize @minus
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@item None.
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@end itemize
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@section Error Messages
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This module has the following error messages:
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@itemize @minus
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@item 2001: instruction not supported on selected architecture
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@item 2002: trailing garbage in operand
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@item 2003: missing closing parenthesis in addressing mode
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@item 2004: data size %d not supported
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@item 2005: relocation does not allow hi/lo modifier
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@item 2006: operand doesn't fit into 8-bits
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@item 2007: branch destination out of range
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@item 2008: illegal bit number
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@end itemize
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