561 lines
11 KiB
C
561 lines
11 KiB
C
/* uart.c
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*
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*/
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#include "uart.h"
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#include <queue.h>
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#include <hal.h>
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#include <stm32f4xx_hal_usart.h>
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enum
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{
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uart1TxBufferSize = 64,
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uart1RxBufferSize = 64,
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uart2TxBufferSize = 64,
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uart2RxBufferSize = 128,
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uart3TxBufferSize = 64,
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uart3RxBufferSize = 64
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};
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static uint8_t uart1TxBuffer[uart1TxBufferSize];
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static uint8_t uart1RxBuffer[uart1RxBufferSize];
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static uint8_t uart2TxBuffer[uart2TxBufferSize];
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static uint8_t uart2RxBuffer[uart2RxBufferSize];
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static uint8_t uart3TxBuffer[uart3TxBufferSize];
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static uint8_t uart3RxBuffer[uart3RxBufferSize];
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static Queue8 uart1TxQ;
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static Queue8 uart1RxQ;
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static Queue8 uart2TxQ;
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static Queue8 uart2RxQ;
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static Queue8 uart3TxQ;
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static Queue8 uart3RxQ;
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static bool uart1TxPrimed; // is uart tx reg empty interrupt enabled
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static bool uart2TxPrimed;
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static bool uart3TxPrimed;
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static bool uart1RxOverflow; // overlow in uart rx Q (currently set but not used)
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static bool uart2RxOverflow;
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static bool uart3RxOverflow;
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int uart_putChar(uint8_t uart, char c)
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{
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// enqueue a char to a uart
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// returns 0 on success
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int status;
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switch( uart )
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{
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case uart_uart1:
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status = queue8_enqueue(&uart1TxQ, (uint8_t)c);
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if( !uart1TxPrimed )
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{
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uart1TxPrimed = true;
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USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
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}
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break;
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case uart_uart2:
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status = queue8_enqueue(&uart2TxQ, (uint8_t)c);
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if( !uart2TxPrimed )
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{
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uart2TxPrimed = true;
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USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
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}
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break;
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case uart_uart3:
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status = queue8_enqueue(&uart3TxQ, (uint8_t)c);
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if( !uart3TxPrimed )
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{
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uart3TxPrimed = true;
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USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
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}
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break;
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default:
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status = -1;
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}
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return status;
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}
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int uart_getChar(uint8_t uart, char* c)
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{
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// dequeue a char from a uart and put it in *c
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// returns 0 on success
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int status;
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switch( uart )
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{
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case uart_uart1:
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status = queue8_dequeue(&uart1RxQ, (uint8_t*)c);
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break;
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case uart_uart2:
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status = queue8_dequeue(&uart2RxQ, (uint8_t*)c);
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break;
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case uart_uart3:
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status = queue8_dequeue(&uart3RxQ, (uint8_t*)c);
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break;
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default:
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status = -1;
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}
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return status;
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}
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int uart_write(uint8_t uart, uint8_t* buffer, uint8_t size)
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{
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// write a buffer of data to a uart
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// return the number of bytes written
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int status;
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uint8_t bytes = 0;
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Queue8* queue = 0;
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USART_TypeDef* usart;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1TxQ;
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uart1TxPrimed = true;
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usart = USART1;
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break;
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case uart_uart2:
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queue = &uart2TxQ;
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uart2TxPrimed = true;
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usart = USART2;
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break;
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case uart_uart3:
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queue = &uart3TxQ;
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uart3TxPrimed = true;
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usart = USART3;
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break;
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default:
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break;
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}
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if( queue )
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{
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uint8_t* bufferPtr = buffer;
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for( bytes = 0; bytes < size; ++bytes )
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{
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status = queue8_enqueue(queue, *bufferPtr++);
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if( status )
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break;
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}
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USART_ITConfig(usart, USART_IT_TXE, ENABLE);
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}
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return bytes;
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}
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int uart_read(uint8_t uart, uint8_t* buffer, uint8_t size)
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{
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// try to read size bytes of data into buffer from a uart
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// return the number of bytes read
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int status;
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uint8_t bytes = 0;
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Queue8* queue = 0;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1RxQ;
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break;
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case uart_uart2:
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queue = &uart2RxQ;
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break;
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case uart_uart3:
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queue = &uart3RxQ;
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break;
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default:
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break;
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}
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if( queue )
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{
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uint8_t* bufferPtr = buffer;
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for( bytes = 0; bytes < size; ++bytes )
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{
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status = queue8_dequeue(queue, bufferPtr);
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if( status )
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break;
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++bufferPtr;
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}
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}
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return bytes;
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}
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void uart_init(uint8_t uart)
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{
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switch( uart )
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{
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case uart_uart1:
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// setup data structures
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queue8_init(&uart1TxQ, uart1TxBuffer, uart1TxBufferSize);
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queue8_init(&uart1RxQ, uart1RxBuffer, uart1RxBufferSize);
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// init h/w
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hal_setupUart1();
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break;
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case uart_uart2:
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queue8_init(&uart2TxQ, uart2TxBuffer, uart2TxBufferSize);
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queue8_init(&uart2RxQ, uart2RxBuffer, uart2RxBufferSize);
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hal_setupUart2();
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break;
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case uart_uart3:
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queue8_init(&uart3TxQ, uart3TxBuffer, uart3TxBufferSize);
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queue8_init(&uart3RxQ, uart3RxBuffer, uart3RxBufferSize);
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#ifdef SIRF_MODULE
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hal_setupUart3(4800);
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#endif
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#ifdef MEDIATEK_MODULE
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hal_setupUart3(9600);
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#endif
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break;
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default:
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// do nothing
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break;
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}
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}
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void uart_deinit(uint8_t uart)
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{
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switch( uart )
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{
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case uart_uart1:
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hal_resetUart1();
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break;
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case uart_uart2:
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hal_resetUart2();
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break;
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case uart_uart3:
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hal_resetUart3();
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break;
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default:
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// do nothing
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break;
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}
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}
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void uart_enable(uint8_t uart)
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{
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// enable a uart, enables rxne interrupt, does not set other config info
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switch( uart )
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{
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case uart_uart1:
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USART_Cmd(USART1, ENABLE);
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USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
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break;
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case uart_uart2:
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USART_Cmd(USART2, ENABLE);
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USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
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break;
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case uart_uart3:
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USART_Cmd(USART3, ENABLE);
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USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
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break;
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default:
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break;
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}
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}
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void uart_disable(uint8_t uart)
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{
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// disable a uart and the uart rxne and txe itnerrupts but leave registers setup
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switch( uart )
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{
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case uart_uart1:
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USART_ITConfig(USART1, USART_IT_RXNE, DISABLE);
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USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
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USART_Cmd(USART1, DISABLE);
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break;
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case uart_uart2:
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USART_ITConfig(USART1, USART_IT_RXNE, DISABLE);
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USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
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USART_Cmd(USART2, DISABLE);
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break;
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case uart_uart3:
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USART_ITConfig(USART3, USART_IT_RXNE, DISABLE);
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USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
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USART_Cmd(USART3, DISABLE);
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break;
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default:
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break;
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}
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}
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void uart_purgeRxQueue(uint8_t uart)
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{
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// purge the rx q for uart
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Queue8* queue = 0;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1RxQ;
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break;
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case uart_uart2:
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queue = &uart2RxQ;
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break;
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case uart_uart3:
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queue = &uart3RxQ;
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break;
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default:
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break;
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}
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queue8_purge(queue);
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}
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int uart_getRxQueueCount(uint8_t uart)
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{
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// get the count for the rx q for uart
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int count;
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Queue8* queue = 0;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1RxQ;
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break;
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case uart_uart2:
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queue = &uart2RxQ;
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break;
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case uart_uart3:
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queue = &uart3RxQ;
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break;
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default:
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break;
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}
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count = queue8_getCount(queue);
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return count;
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}
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//Checks for a particular character within a Queue
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//Does not dequeueueue
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int uart_queueHasChar(char c, uint8_t uart)
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{
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Queue8* queue = 0;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1RxQ;
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break;
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case uart_uart2:
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queue = &uart2RxQ;
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break;
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case uart_uart3:
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queue = &uart3RxQ;
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break;
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default:
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break;
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}
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//I think this has a bug where if the queue is empty (ie pRD == pWR) it scans through the whole queue intead of returning immediately.
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//Since the queue may actually contain the desired char in it's currently unused spaces, this returns true, but since the dequeue function
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//doesn't remove them, the while loops that this function is placed in never release.
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if(queue->qCount == 0)
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return false;
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uint8_t i = 0;
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for(i = queue->readIndex; i != queue->writeIndex; i++)
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{
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i = i % queue->size;
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if(queue->data[i] == c) return true;
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}
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return false;
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}
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int uart_queueContains(char thingToFind[], int thingToFindLength, uint8_t uart)
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{
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Queue8* queue = 0;
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switch( uart )
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{
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case uart_uart1:
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queue = &uart1RxQ;
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break;
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case uart_uart2:
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queue = &uart2RxQ;
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break;
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case uart_uart3:
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queue = &uart3RxQ;
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break;
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default:
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break;
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}
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uint8_t i = 0;
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int examinationIndex = 0;
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for(i = queue->readIndex; i != queue->writeIndex; i++)
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{
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i = i % queue->size;
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if(queue->data[i] == thingToFind[examinationIndex])
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examinationIndex++;
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else
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examinationIndex = 0;
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if (examinationIndex >= thingToFindLength) //We've matched all the characters we were looking for, return true;
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return true;
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}
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return false;
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}
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void USART1_IRQHandler(void)
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{
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// uart 1 interrupt handler
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// this function name must match that in the startup file
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// handle uart rx char
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if( USART_GetITStatus(USART1, USART_IT_RXNE) != RESET )
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{
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uint8_t data;
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data = USART_ReceiveData(USART1) & 0xFF;
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if( queue8_enqueue(&uart1RxQ, data) )
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uart1RxOverflow = true;
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}
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// handle uart tx char empty
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if( USART_GetITStatus(USART1, USART_IT_TXE) != RESET )
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{
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uint8_t data;
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if( !queue8_dequeue(&uart1TxQ, &data) )
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{
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USART_SendData(USART1, data);
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}
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else
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{
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USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
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uart1TxPrimed = false;
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}
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}
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}
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//void USART2_IRQHandler(void)
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//{
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// // uart 2 interrupt handler
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// // this function name must match that in the startup file
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//
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// // handle uart rx char
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// if( USART_GetITStatus(USART2, USART_IT_RXNE) != RESET )
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// {
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// uint8_t data;
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//
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// data = USART_ReceiveData(USART2) & 0xFF;
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// if( queue8_enqueue(&uart2RxQ, data) )
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// uart2RxOverflow = true;
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// }
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//
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// // handle uart tx char empty
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// if( USART_GetITStatus(USART2, USART_IT_TXE) != RESET )
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// {
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// uint8_t data;
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//
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// if( !queue8_dequeue(&uart2TxQ, &data) )
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// {
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// USART_SendData(USART2, data);
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// }
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// else
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// {
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// USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
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// uart2TxPrimed = false;
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// }
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// }
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//}
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//void USART3_IRQHandler(void)
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//{
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// // uart 3 interrupt handler
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// // this function name must match that in the startup file
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//
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// // handle uart rx char
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// if( USART_GetITStatus(USART3, USART_IT_RXNE) != RESET )
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// {
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// uint8_t data;
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//
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// data = USART_ReceiveData(USART3) & 0xFF;
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// if( queue8_enqueue(&uart3RxQ, data) )
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// uart3RxOverflow = true;
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// }
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//
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// // handle uart tx char empty
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// if( USART_GetITStatus(USART3, USART_IT_TXE) != RESET )
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// {
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// uint8_t data;
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//
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// if( !queue8_dequeue(&uart3TxQ, &data) )
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// {
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// USART_SendData(USART3, data); HAL_USART_Transmit()
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// }
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// else
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// {
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// USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
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// uart3TxPrimed = false;
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// }
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// }
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//}
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