87 lines
2.5 KiB
C
87 lines
2.5 KiB
C
/*
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** cpu.h Jaguar RISC cpu-description header-file
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** (c) in 2014-2017 by Frank Wille
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*/
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extern int jag_big_endian;
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#define BIGENDIAN (jag_big_endian)
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#define LITTLEENDIAN (!jag_big_endian)
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#define VASM_CPU_JAGRISC 1
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/* maximum number of operands for one mnemonic */
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#define MAX_OPERANDS 2
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/* maximum number of mnemonic-qualifiers per mnemonic */
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#define MAX_QUALIFIERS 0
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/* data type to represent a target-address */
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typedef int32_t taddr;
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typedef uint32_t utaddr;
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/* minimum instruction alignment */
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#define INST_ALIGN 2
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/* default alignment for n-bit data */
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#define DATA_ALIGN(n) ((n<=8)?1:2)
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/* operand class for n-bit data definitions */
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int jag_data_operand(int);
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#define DATA_OPERAND(n) jag_data_operand(n)
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/* returns true when instruction is valid for selected cpu */
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#define MNEMONIC_VALID(i) cpu_available(i)
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/* type to store each operand */
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typedef struct {
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uint8_t type;
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int8_t reg;
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expr *val;
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} operand;
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/* operand types */
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enum {
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NO_OP=0,
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DATA_OP,
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DATA64_OP,
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DATAI_OP, /* 32-bit with swapped halfwords */
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REG, /* register Rn */
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IMM0, /* 5-bit immediate expression (0-31) */
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IMM1, /* 5-bit immediate expression (1-32) */
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IMM1S, /* 5-bit immediate expression 32-(1-32) for SHLQ */
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SIMM, /* 5-bit signed immediate expression (-16 - 15) */
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IMMLW, /* 32-bit immediate expression in extra longword */
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IREG, /* register indirect (Rn) */
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IR14D, /* register R14 plus displacement indirect (R14+n) */
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IR15D, /* register R15 plus displacement indirect (R15+n) */
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IR14R, /* register R14 plus register Rn indirect (R14+Rn) */
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IR15R, /* register R15 plus register Rn indirect (R15+Rn) */
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CC, /* condition code, t, cc, cs, eq, ne, mi, pl, hi */
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REL, /* relative branch, PC + 2 + (-16..15) words */
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PC /* PC register */
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};
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/* additional mnemonic data */
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typedef struct {
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uint8_t opcode;
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uint8_t flags;
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} mnemonic_extension;
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/* Values defined for the 'flags' field of mnemonic_extension. */
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#define GPU 1
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#define DSP 2
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#define ANY GPU|DSP
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#define OPSWAP 128 /* swapped operands in instruction word encoding */
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/* Register symbols */
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#define HAVE_REGSYMS
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#define REGSYMHTSIZE 64
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#define RTYPE_R 0 /* R0-R31 */
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#define RTYPE_CC 1 /* condition codes (0-31) */
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/* Prototypes */
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int cpu_available(int);
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int parse_cpu_label(char *,char **);
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#define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s)
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