618 lines
14 KiB
C
618 lines
14 KiB
C
/*
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* cpu.c Jaguar RISC cpu description file
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* (c) in 2014-2017 by Frank Wille
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*/
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#include "vasm.h"
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mnemonic mnemonics[] = {
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#include "opcodes.h"
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};
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int mnemonic_cnt = sizeof(mnemonics) / sizeof(mnemonics[0]);
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char *cpu_copyright = "vasm Jaguar RISC cpu backend 0.4c (c) 2014-2017 Frank Wille";
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char *cpuname = "jagrisc";
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int bitsperbyte = 8;
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int bytespertaddr = 4;
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int jag_big_endian = 1; /* defaults to big-endian (Atari Jaguar 68000) */
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static uint8_t cpu_type = GPU|DSP;
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static int OC_MOVEI,OC_UNPACK;
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/* condition codes */
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static regsym cc_regsyms[] = {
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{"T", RTYPE_CC, 0, 0x00},
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{"NE", RTYPE_CC, 0, 0x01},
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{"EQ", RTYPE_CC, 0, 0x02},
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{"CC", RTYPE_CC, 0, 0x04},
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{"HI", RTYPE_CC, 0, 0x05},
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{"CS", RTYPE_CC, 0, 0x08},
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{"PL", RTYPE_CC, 0, 0x14},
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{"MI", RTYPE_CC, 0, 0x18},
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{"t", RTYPE_CC, 0, 0x00},
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{"ne", RTYPE_CC, 0, 0x01},
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{"eq", RTYPE_CC, 0, 0x02},
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{"cc", RTYPE_CC, 0, 0x04},
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{"hi", RTYPE_CC, 0, 0x05},
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{"cs", RTYPE_CC, 0, 0x08},
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{"pl", RTYPE_CC, 0, 0x14},
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{"mi", RTYPE_CC, 0, 0x18},
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{NULL, 0, 0, 0}
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};
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int init_cpu(void)
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{
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int i;
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regsym *r;
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for (i=0; i<mnemonic_cnt; i++) {
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if (!strcmp(mnemonics[i].name,"movei"))
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OC_MOVEI = i;
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else if (!strcmp(mnemonics[i].name,"unpack"))
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OC_UNPACK = i;
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}
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/* define all condition code register symbols */
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for (r=cc_regsyms; r->reg_name!=NULL; r++)
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add_regsym(r);
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return 1;
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}
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int cpu_args(char *p)
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{
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if (!strncmp(p,"-m",2)) {
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p += 2;
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if (!stricmp(p,"gpu") || !stricmp(p,"tom"))
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cpu_type = GPU;
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else if (!stricmp(p,"dsp") || !stricmp(p,"jerry"))
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cpu_type = DSP;
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else if (!strcmp(p,"any"))
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cpu_type = GPU|DSP;
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else
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return 0;
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}
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else if (!strcmp(p,"-big"))
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jag_big_endian = 1;
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else if (!strcmp(p,"-little"))
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jag_big_endian = 0;
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else
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return 0;
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return 1;
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}
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static int parse_reg(char **p)
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{
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int reg = -1;
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char *rp = skip(*p);
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char *s;
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if (s = skip_identifier(rp)) {
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regsym *sym = find_regsym(rp,s-rp);
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if (sym!=NULL && sym->reg_type==RTYPE_R) {
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reg = sym->reg_num;
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}
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else if (toupper((unsigned char)*rp++) == 'R') {
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if (sscanf(rp,"%d",®)!=1 || reg<0 || reg>31)
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reg = -1;
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}
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if (reg >= 0)
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*p = s;
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}
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return reg;
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}
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static expr *parse_cc(char **p)
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{
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char *end;
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*p = skip(*p);
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if (end = skip_identifier(*p)) {
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regsym *sym = find_regsym(*p,end-*p);
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if (sym!=NULL && sym->reg_type==RTYPE_CC) {
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*p = end;
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return number_expr((taddr)sym->reg_num);
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}
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}
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/* otherwise the condition code is any expression */
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return parse_expr(p);
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}
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static void jagswap32(char *d,int32_t w)
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/* write a 32-bit word with swapped halfs (Jaguar MOVEI) */
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{
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if (jag_big_endian) {
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*d++ = (w >> 8) & 0xff;
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*d++ = w & 0xff;
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*d++ = (w >> 24) & 0xff;
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*d = (w >> 16) & 0xff;
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}
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else {
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/* @@@ Need to verify this! */
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*d++ = w & 0xff;
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*d++ = (w >> 8) & 0xff;
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*d++ = (w >> 16) & 0xff;
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*d = (w >> 24) & 0xff;
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}
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}
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char *parse_cpu_special(char *start)
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/* parse cpu-specific directives; return pointer to end of cpu-specific text */
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{
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char *name=start;
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char *s;
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if (s = skip_identifier(name)) {
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/* Atari MadMac compatibility directives */
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if (*name == '.') /* ignore leading dot */
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name++;
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if (s-name==3 && !strnicmp(name,"dsp",3)) {
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cpu_type = DSP;
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eol(s);
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return skip_line(s);
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}
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else if (s-name==3 && !strnicmp(name,"gpu",3)) {
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cpu_type = GPU;
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eol(s);
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return skip_line(s);
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}
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else if (s-name==8 && !strnicmp(name,"regundef",8) ||
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s-name==9 && !strnicmp(name,"equrundef",9)) {
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/* undefine a register symbol */
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s = skip(s);
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if (name = parse_identifier(&s)) {
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undef_regsym(name,0,RTYPE_R);
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myfree(name);
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eol(s);
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return skip_line(s);
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}
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}
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else if (s-name==7 && !strnicmp(name,"ccundef",7)) {
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/* undefine a condition code symbol */
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s = skip(s);
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if (name = parse_identifier(&s)) {
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undef_regsym(name,0,RTYPE_CC);
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myfree(name);
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eol(s);
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return skip_line(s);
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}
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}
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}
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return start;
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}
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int parse_cpu_label(char *labname,char **start)
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/* parse cpu-specific directives following a label field,
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return zero when no valid directive was recognized */
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{
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char *dir=*start;
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char *s,*name;
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hashdata data;
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if (*dir == '.') /* ignore leading dot */
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dir++;
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if (s = skip_identifier(dir)) {
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if (s-dir==6 && !strnicmp(dir,"regequ",6) ||
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s-dir==4 && !strnicmp(dir,"equr",4)) {
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/* label REGEQU Rn || label EQUR Rn */
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int r;
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if ((r = parse_reg(&s)) >= 0)
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new_regsym(0,0,labname,RTYPE_R,0,r);
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else
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cpu_error(3); /* register expected */
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eol(s);
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*start = skip_line(s);
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return 1;
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}
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else if (s-dir==5 && !strnicmp(dir,"ccdef",5)) {
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/* label CCDEF expr */
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expr *ccexp;
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taddr val;
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if ((ccexp = parse_cc(&s)) != NULL) {
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if (eval_expr(ccexp,&val,NULL,0))
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new_regsym(0,0,labname,RTYPE_CC,0,(int)val);
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else
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general_error(30); /* expression must be a constant */
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}
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else
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general_error(9); /* @@@ */
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eol(s);
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*start = skip_line(s);
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return 1;
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}
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}
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return 0;
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}
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operand *new_operand(void)
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{
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operand *new = mymalloc(sizeof(*new));
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new->type = NO_OP;
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return new;
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}
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int jag_data_operand(int bits)
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/* return data operand type for these number of bits */
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{
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if (bits & OPSZ_SWAP)
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return DATAI_OP;
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return bits==64 ? DATA64_OP : DATA_OP;
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}
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int parse_operand(char *p, int len, operand *op, int required)
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{
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int reg;
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switch (required) {
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case IMM0:
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case IMM1:
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case IMM1S:
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case SIMM:
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case IMMLW:
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if (*p == '#')
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p = skip(p+1); /* skip optional '#' */
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case REL:
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case DATA_OP:
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case DATAI_OP:
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if (required == IMM1S) {
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op->val = make_expr(SUB,number_expr(32),parse_expr(&p));
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required = IMM1; /* turn into IMM1 32-val for SHLQ */
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}
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else
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op->val = parse_expr(&p);
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break;
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case DATA64_OP:
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op->val = parse_expr_huge(&p);
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break;
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case REG: /* Rn */
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op->reg = parse_reg(&p);
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if (op->reg < 0)
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return PO_NOMATCH;
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break;
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case IREG: /* (Rn) */
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if (*p++ != '(')
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return PO_NOMATCH;
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op->reg = parse_reg(&p);
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if (op->reg < 0)
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return PO_NOMATCH;
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if (*p != ')')
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return PO_NOMATCH;
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break;
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case IR14D: /* (R14+d) */
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case IR15D: /* (R15+d) */
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if (*p++ != '(')
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return PO_NOMATCH;
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reg = parse_reg(&p);
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if ((required==IR14D && reg!=14) || (required==IR15D && reg!=15))
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return PO_NOMATCH;
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if (*p++ != '+')
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return PO_NOMATCH;
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p = skip(p);
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op->val = parse_expr(&p);
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p = skip(p);
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if (*p != ')')
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return PO_NOMATCH;
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break;
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case IR14R: /* (R14+Rn) */
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case IR15R: /* (R15+Rn) */
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if (*p++ != '(')
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return PO_NOMATCH;
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reg = parse_reg(&p);
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if ((required==IR14R && reg!=14) || (required==IR15R && reg!=15))
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return PO_NOMATCH;
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if (*p++ != '+')
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return PO_NOMATCH;
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op->reg = parse_reg(&p);
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if (op->reg < 0)
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return PO_NOMATCH;
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if (*p != ')')
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return PO_NOMATCH;
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break;
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case CC: /* condition code: t, eq, ne, mi, pl, cc, cs, ... */
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op->val = parse_cc(&p);
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break;
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case PC: /* PC register */
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if (toupper((unsigned char)*p) != 'P' ||
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toupper((unsigned char)*(p+1)) != 'C' ||
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ISIDCHAR(*(p+2)))
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return PO_NOMATCH;
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break;
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default:
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return PO_NOMATCH;
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}
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op->type = required;
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return PO_MATCH;
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}
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static int32_t eval_oper(instruction *ip,operand *op,section *sec,
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taddr pc,dblock *db)
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{
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symbol *base = NULL;
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int optype = op->type;
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int btype;
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taddr val,loval,hival,mask;
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switch (optype) {
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case PC:
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return 0;
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case REG:
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case IREG:
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case IR14R:
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case IR15R:
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return op->reg;
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case IMM0:
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case IMM1:
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case SIMM:
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case IMMLW:
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case IR14D:
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case IR15D:
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case REL:
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case CC:
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mask = 0x1f;
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if (!eval_expr(op->val,&val,sec,pc))
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btype = find_base(op->val,&base,sec,pc);
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if (optype==IMM0 || optype==CC || optype==IMM1 || optype==SIMM) {
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if (base != NULL) {
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loval = -32;
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hival = 32;
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if (btype != BASE_ILLEGAL) {
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if (db) {
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add_extnreloc_masked(&db->relocs,base,val,
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btype==BASE_PCREL?REL_PC:REL_ABS,
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jag_big_endian?6:5,5,0,0x1f);
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base = NULL;
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}
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}
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}
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else if (optype==IMM1) {
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loval = 1;
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hival = 32;
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}
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else if (optype==SIMM) {
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loval = -16;
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hival = 15;
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}
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else {
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loval = 0;
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hival = 31;
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}
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}
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else if (optype==IR14D || optype==IR15D) {
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if (base==NULL && val==0) {
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/* Optimize (Rn+0) to (Rn). Assume that the "load/store (Rn+d)"
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instructions follow directly after "load/store (Rn)". */
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ip->code -= optype==IR14D ? 1 : 2;
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op->type = IREG;
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op->reg = optype==IR14D ? 14 : 15;
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return op->reg;
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}
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loval = 1;
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hival = 32;
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}
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else if (optype==IMMLW) {
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mask = ~0;
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if (base != NULL) {
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if (btype != BASE_ILLEGAL) {
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if (db) {
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/* two relocations for LSW first, then MSW */
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add_extnreloc_masked(&db->relocs,base,val,
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btype==BASE_PCREL?REL_PC:REL_ABS,
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0,16,2,0xffff);
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add_extnreloc_masked(&db->relocs,base,val,
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btype==BASE_PCREL?REL_PC:REL_ABS,
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16,16,2,0xffff0000);
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base = NULL;
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}
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}
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}
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}
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else if (optype==REL) {
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loval = -16;
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hival = 15;
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if (base!=NULL && btype==BASE_OK) {
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if (is_pc_reloc(base,sec)) {
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/* external label or from a different section (distance / 2) */
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add_extnreloc_masked(&db->relocs,base,val-2,REL_PC,
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jag_big_endian?6:5,5,0,0x3e);
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}
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else if (LOCREF(base)) {
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/* known label from the same section doesn't need a reloc */
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val = (val - (pc + 2)) / 2;
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}
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base = NULL;
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}
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}
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else ierror(0);
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if (base != NULL)
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general_error(38); /* bad or unhandled reloc: illegal relocation */
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/* range check for this addressing mode */
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if (mask!=~0 && (val<loval || val>hival))
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cpu_error(1,(long)loval,(long)hival);
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return val & mask;
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default:
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ierror(0);
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break;
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}
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return 0; /* default */
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}
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size_t instruction_size(instruction *ip, section *sec, taddr pc)
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{
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return ip->code==OC_MOVEI ? 6 : 2;
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}
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dblock *eval_instruction(instruction *ip, section *sec, taddr pc)
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{
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dblock *db = new_dblock();
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int32_t src=0,dst=0,extra;
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int size = 2;
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uint16_t inst;
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/* get source and destination argument, when present */
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if (ip->op[0])
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dst = eval_oper(ip,ip->op[0],sec,pc,db);
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if (ip->op[1]) {
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if (ip->code == OC_MOVEI) {
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extra = dst;
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size = 6;
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}
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else
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src = dst;
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dst = eval_oper(ip,ip->op[1],sec,pc,db);
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}
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else if (ip->code == OC_UNPACK)
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src = 1; /* pack(src=0)/unpack(src=1) use the same opcode */
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/* store and jump instructions need the second operand in the source field */
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if (mnemonics[ip->code].ext.flags & OPSWAP) {
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extra = src;
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src = dst;
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dst = extra;
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}
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/* allocate dblock data for instruction */
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db->size = size;
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db->data = mymalloc(size);
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/* construct the instruction word out of opcode and source/dest. value */
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inst = (mnemonics[ip->code].ext.opcode & 63) << 10;
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inst |= ((src&31) << 5) | (dst & 31);
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/* write instruction */
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if (jag_big_endian) {
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db->data[0] = (inst >> 8) & 0xff;
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db->data[1] = inst & 0xff;
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}
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else {
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db->data[0] = inst & 0xff;
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db->data[1] = (inst >> 8) & 0xff;
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}
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/* extra words for MOVEI are always written in the order lo-word, hi-word */
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if (size == 6)
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jagswap32(&db->data[2],extra);
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return db;
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}
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dblock *eval_data(operand *op, size_t bitsize, section *sec, taddr pc)
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{
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dblock *db = new_dblock();
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taddr val;
|
|
|
|
if (bitsize!=8 && bitsize!=16 && bitsize!=32 && bitsize!=64)
|
|
cpu_error(0,bitsize); /* data size not supported */
|
|
|
|
if (op->type!=DATA_OP && op->type!=DATA64_OP && op->type!=DATAI_OP)
|
|
ierror(0);
|
|
|
|
db->size = bitsize >> 3;
|
|
db->data = mymalloc(db->size);
|
|
|
|
if (op->type == DATA64_OP) {
|
|
thuge hval;
|
|
|
|
if (!eval_expr_huge(op->val,&hval))
|
|
general_error(59); /* cannot evaluate huge integer */
|
|
huge_to_mem(jag_big_endian,db->data,db->size,hval);
|
|
}
|
|
else {
|
|
if (!eval_expr(op->val,&val,sec,pc)) {
|
|
symbol *base;
|
|
int btype;
|
|
|
|
btype = find_base(op->val,&base,sec,pc);
|
|
if (base!=NULL && btype!=BASE_ILLEGAL) {
|
|
if (op->type == DATAI_OP) {
|
|
/* swapped: two relocations for LSW first, then MSW */
|
|
add_extnreloc_masked(&db->relocs,base,val,
|
|
btype==BASE_PCREL?REL_PC:REL_ABS,
|
|
0,16,0,0xffff);
|
|
add_extnreloc_masked(&db->relocs,base,val,
|
|
btype==BASE_PCREL?REL_PC:REL_ABS,
|
|
16,16,0,0xffff0000);
|
|
}
|
|
else /* normal 8, 16, 32 bit relocation */
|
|
add_extnreloc(&db->relocs,base,val,
|
|
btype==BASE_PCREL?REL_PC:REL_ABS,0,bitsize,0);
|
|
}
|
|
else if (btype != BASE_NONE)
|
|
general_error(38); /* illegal relocation */
|
|
}
|
|
|
|
switch (db->size) {
|
|
case 1:
|
|
db->data[0] = val & 0xff;
|
|
break;
|
|
case 2:
|
|
case 4:
|
|
if (op->type == DATAI_OP)
|
|
jagswap32(db->data,(int32_t)val);
|
|
else
|
|
setval(jag_big_endian,db->data,db->size,val);
|
|
break;
|
|
default:
|
|
ierror(0);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return db;
|
|
}
|
|
|
|
|
|
int cpu_available(int idx)
|
|
{
|
|
return (mnemonics[idx].ext.flags & cpu_type) != 0;
|
|
}
|